1. Algorithms for stereoscopic 3D conversion for 360-degree VR contents - 2D panorama input up to 4096x2048 resolution. - 2:1 display aspect ratio. - Configurable with different parameter settings: depth map generation mode, 3D depth level, zero plane position, degree of field of view, lens distortion factor and chromatic aberration correction. - Side-by-side and top-and-bottom 3D output. - Adaptive depth of view based on depth map and center of field. - Dynamic field of view based on object’s moving speed. 2. FPGA implementation of stereoscopic 3D 360-degree VR conversion - Algorithm implementation in Xilinx 7 series FPGA, or equivalent. - Support 3D conversion processing up to 4096x2048 resolution at 60Hz frame rate. 3. Hardware boards for stereoscopic 3D 360-degree VR conversion hardware acceleration - Design with FPGA or structured ASIC for 3D conversion. - Support MIPI input and output interface. - Compatible with commonly used the multimedia processor, e.g. RK3288, on all-in-one head-mounted display. 4. Structured ASIC implementation for 3D 360-degree HMD device (CS1) - Algorithm implementation in structured ASIC in 28nm process technology. - Support depth map generation, field of view cropping, geometric restoration, stereoscopic 3D generation based on heading track information and MIPI interface. 5. Software plug-in for stereoscopic 3D conversion for 360-degree VR contents (CS2) - Compatible with Adobe After Effects and Unity. - Support Windows 7/8/10, Mac OS X/macOS. - Support stereoscopic 3D conversion for 360-degree VR contents, up to 4096x2048 resolution and 2:1 display aspect ratio.1. Algorithms for stereoscopic 3D conversion for 360-degree VR contents - 2D panorama input up to 4096x2048 resolution. - 2:1 display aspect ratio. - Configurable with different parameter settings: depth map generation mode, 3D depth level, zero plane position, degree of field of view, lens distortion factor and chromatic aberration correction. - Side-by-side and top-and-bottom 3D output. - Adaptive depth of view based on depth map and center of field. - Dynamic field of view based on object’s moving speed. 2. FPGA implementation of stereoscopic 3D 360-degree VR conversion - Algorithm implementation in Xilinx 7 series FPGA, or equivalent. - Support 3D conversion processing up to 4096x2048 resolution at 60Hz frame rate. 3. Hardware boards for stereoscopic 3D 360-degree VR conversion hardware acceleration - Design with FPGA or structured ASIC for 3D conversion. - Support MIPI input and output interface. - Compatible with commonly used the multimedia processor, e.g. RK3288, on all-in-one head-mounted display. 4. Structured ASIC implementation for 3D 360-degree HMD device (CS1) - Algorithm implementation in structured ASIC in 28nm process technology. - Support depth map generation, field of view cropping, geometric restoration, stereoscopic 3D generation based on heading track information and MIPI interface. 5. Software plug-in for stereoscopic 3D conversion for 360-degree VR contents (CS2) - Compatible with Adobe After Effects and Unity. - Support Windows 7/8/10, Mac OS X/macOS. - Support stereoscopic 3D conversion for 360-degree VR contents, up to 4096x2048 resolution and 2:1 display aspect ratio.
Go VR Immersive Limited
Marvel Digital Limited
Stereoscopic 3D in VR can bring another level of immersion experience to viewers by stereo vision and depth perception. However, the stereoscopic 3D 360-degree VR contents are very limited nowadays. In this project, we are going to develop the image processing technologies for stereoscopic 3D generation for 360-degree VR from 2D 360-degree VR contents. The key deliverables will include the novel algorithms and world-first ASIC for stereoscopic 360-degree content generation for VR. The project technologies can widely adopt in different application areas, including gaming, movie, education, virtual tour, medical, etc.