1. Algorithms for stereoscopic 3D conversion for 360-degree VR contents - 2D panorama input up to 4096x2048 resolution. - 2:1 display aspect ratio. - Configurable with different parameter settings: depth map generation mode, 3D depth level, zero plane position, degree of field of view, lens distortion factor and chromatic aberration correction. - Side-by-side and top-and-bottom 3D output. - Adaptive depth of view based on depth map and center of field. - Dynamic field of view based on object’s moving speed. 2. FPGA implementation of stereoscopic 3D 360-degree VR conversion - Algorithm implementation in Xilinx 7 series FPGA, or equivalent. - Support 3D conversion processing up to 4096x2048 resolution at 60Hz frame rate. 3. Hardware boards for stereoscopic 3D 360-degree VR conversion hardware acceleration - Design with FPGA or structured ASIC for 3D conversion. - Support MIPI input and output interface. - Compatible with commonly used the multimedia processor, e.g. RK3288, on all-in-one head-mounted display. 4. Structured ASIC implementation for 3D 360-degree HMD device (CS1) - Algorithm implementation in structured ASIC in 28nm process technology. - Support depth map generation, field of view cropping, geometric restoration, stereoscopic 3D generation based on heading track information and MIPI interface. 5. Software plug-in for stereoscopic 3D conversion for 360-degree VR contents (CS2) - Compatible with Adobe After Effects and Unity. - Support Windows 7/8/10, Mac OS X/macOS. - Support stereoscopic 3D conversion for 360-degree VR contents, up to 4096x2048 resolution and 2:1 display aspect ratio.1. Algorithms for stereoscopic 3D conversion for 360-degree VR contents - 2D panorama input up to 4096x2048 resolution. - 2:1 display aspect ratio. - Configurable with different parameter settings: depth map generation mode, 3D depth level, zero plane position, degree of field of view, lens distortion factor and chromatic aberration correction. - Side-by-side and top-and-bottom 3D output. - Adaptive depth of view based on depth map and center of field. - Dynamic field of view based on object’s moving speed. 2. FPGA implementation of stereoscopic 3D 360-degree VR conversion - Algorithm implementation in Xilinx 7 series FPGA, or equivalent. - Support 3D conversion processing up to 4096x2048 resolution at 60Hz frame rate. 3. Hardware boards for stereoscopic 3D 360-degree VR conversion hardware acceleration - Design with FPGA or structured ASIC for 3D conversion. - Support MIPI input and output interface. - Compatible with commonly used the multimedia processor, e.g. RK3288, on all-in-one head-mounted display. 4. Structured ASIC implementation for 3D 360-degree HMD device (CS1) - Algorithm implementation in structured ASIC in 28nm process technology. - Support depth map generation, field of view cropping, geometric restoration, stereoscopic 3D generation based on heading track information and MIPI interface. 5. Software plug-in for stereoscopic 3D conversion for 360-degree VR contents (CS2) - Compatible with Adobe After Effects and Unity. - Support Windows 7/8/10, Mac OS X/macOS. - Support stereoscopic 3D conversion for 360-degree VR contents, up to 4096x2048 resolution and 2:1 display aspect ratio.
高视维创意传播有限公司
万维数码有限公司
立体3D通过立体视觉和深度知觉可进一步增加VR使用者的沉浸感。然而，当前具有立体3D的360度VR全景內容还非常有限。 本项目將研究开发针对360度VR立体3D生成的影像处理技术。项目成果將包括360度VR立体3D內容生成全新算法和世界上首款具有360度VR立体3D 转换功能的ASIC芯片。 本项目所研发的技术可以广泛应用於包括游戏、电影、教育、虚擬游览、医疗等不同领域。