Job Description
Reference #: MSS/TCD/2101/170916
Openings :
Job Responsibilities
- Responsible for schematics and layout design of mixed signal IC building blocks, including all facets of design flow, from schematics to layout, from initial floor-planning to final verification
- Develop new building blocks to cater for the requirements for speed and power consumption
- Develop new design technique and solutions for low power and high speed applications
- Work with team members and possess the ability to work closely with management team to meet or exceed design schedules
Requirements
- Bachelor’s degree with 6+ year relevant experience, Master’s degree with 3+ year relevant experience or Ph.D in Electronic Engineering or related disciplines. Candidates with less experience will be considered as an Engineer
- Extensive experiences in mixed signal IC design, strong background in SRAM or memory compiler design will be a plus
- Familiar with Cadence/Mentor/Synopsys EDA tools; strong capability in programming using language such as Verilog, Skill, or TCL (Tool Command Language)
- Good experiences in ESD, IO or standard cell library design
- Good communication and interpersonal skills, a good team work player
