Low Power ADC

ASTRI has established a family of low power ADC IPs.

12/14 bit low power Successive Approximation Register (SAR) ADC delivers low power and low cost analog to digital conversion of reasonable performance for portable medical and sensor devices. ASTRI’s IP is already in mass production for various applications.

Key features:

  • Sampling rate up to 1Msps
  • Ultra low power
  • ENOB = 11.2b
  • Silicon proven: TSMC 0.18um, TSMC 0.25um, SMIC 0.13um


 24-bit sigma delta ADC is based on sigma delta technology intended primarily for instrumentation applications. It consists of a second-order three-bit quantizer noise shaping modulator and digital decimation filter.

Key features:

  • Low input-referred noise: 1.5uVrms
  • Multi-bit feedback DAC with Data-Weighted Averaging to achieve low power consumption
  • Unity feedforward architecture for low distortion
  • 2nd order modulator loop, stable for full scale input
  • 1Ksps sampling rate
  • Internal or external reference
  • SPI interface