L Lab Corporation (Hong Kong) Limited
Huawei Technologies Co., Ltd.
The development of Moore's Law is constrained by physical limitation, prompting wafer manufacturers to shift their focus from pursuing more advanced nanofabrication processes to the development of innovative 3D-IC packaging technology. Currently, the 3D-IC market is booming fast and is expected to reach $52 billion by 2030. The project objective aims to develop new electroplating methodology with environmentally friendly materials for Sn-Bi microbump fabrication to realize bonding of 3D-IC at temperature lower than 200 °C. A stable bath formula and optimized electroplating process parameters for one-step or two steps electroplating process will be established to produce Sn-Bi alloy microbumps with appropriate composition ratio on Cu microbumps of silicon wafers as the low temperature solder layer.Although Sn-Bi might be relatively more fatigue than Sn-Cu and Sn-Pb, the interconnections could be strengthened by underfill technique which is commonly used in industry. Physical analysis and electrochemical technique, such as XRD, XRF, Raman spectroscopy, LSV, etc., will be applied to facilitate establishment of the electroplatingbath recipe that is environmentally friendly and promoted process parameters. The key matters include rapid screening of appropriate chelator for co-electroplating and evaluation of the efficacy of stabilizing additives in bath formula. Subsequently, 3D-IC stacks bond at< 200 °C will be demonstrated through two layers stacking of the dummy dies fabricated from Si wafer consisting of Sn-Bi alloy microbumps produced using the established one-step or two steps electroplating process. The bonding performance will be justified through JEDEC standard test. The reliability test will follow JEDEC or ASTM standard and the targeted yield is 100%, including bonding strength test, thermal cycle test, lifetime test, and cross-sectional SEM after stress test.