Home > Second Generation Double-Data-Rate (DDR2) Digital Controller and PHYSecond Generation Double-Data-Rate (DDR2) Digital Controller and PHYProject Title:Second Generation Double-Data-Rate (DDR2) Digital Controller and PHYProject Reference:ARD/045Project Type:Project Period:20081231 - 20090630Funds Approved (HK$’000):1960Project Coordinator:Dr Shen-chang ChaoDeputy Project Coordinator:Deliverable:Research Group:Sponsor:Description:Co-Applicant:Keywords:
