Senior Engineer/Engineer, ASIC Design

Senior Engineer/Engineer, ASIC Design

  • Job Description


    Job Responsibilities

    • Carry out research and development for new technologies in video processing / machine learning
    • Carry out system specification, IC architecture definition, micro-architecture design, RTL implementation, logic synthesis and timing analysis for digital IC design projects
    • Develop test plans and monitor execution of module-level and system-level verification


    • Bachelor’s Degree in Electronic Engineering or related fields with 6+ years’ experience, or Master’s Degree with 3+ years’ experience, or PhD holder in related area. Candidates with less experience will be considered position of Engineer
    • Hands-on experience in micro-architecture design, RTL coding, logic synthesis, functional verification, formal verification and timing analysis
    • Hands-on FPGA prototyping and ASIC IC bring up experience
    • SystemVerilog verification experience would be preferred
    • Good in Unix/Linux, and script in Perl, Cshell, and/or tcl
    • Motivated team player and strong communication skills


    Appointment will be on renewable contract terms with a competitive salary and performance-linked variable pay. Fringe benefits include paid leave, medical and dental benefits, insurance coverage and contribution to MPF. The incumbent will normally work under a five-day week schedule.

    Interested candidates should send application (quoting Ref. No.) with detailed resume and, current and expected salary to the HR Department by email (preferable) or post until this position is filled.

    Email: [email protected]
    Post: 5/F, Photonics Centre, 2 Science Park East Avenue,
    Hong Kong Science Park, Shatin, Hong Kong.

    Only short-listed candidates will be notified. Personal data provided by applicants will be used for recruitment purposes only.