- To perform layout design of power electronics module, such as half/full bridge power module, to meet existing or future power product requirements.
- To perform numerical simulation of the power electronics module to evaluate its transient response, determine its parasitic parameters and the corresponding conduction & switching loss.
- To perform benchmarking of the power electronics module by static and transient electrical measurement.
- To understand and propose to improve the device-level electrical performance and reliability of power electronics ICs, especially for the 3rd generation semiconductor devices (SiC & GaN).
- To provide cross-functional co-ordination among thermo-mechanical, materials and process, test and reliability groups for product implementation.
- To conduct literature and marketing review on products, patents and research papers to collect background information and facilitate proposal drafting.
- PhD holder in power electronics engineering, electrical engineering, computer science, computer engineering, electronic engineering or other related disciplines, including non-local applicant.
- Skillful in electrical layout design for high power electronics package/module/system such as MOSFET, GaN FET, inverter, charger, wireless power transfer module, etc.
- Experience in programming or using numerical design related software (e.g. ANSYS Q3D Extractor, HFSS, ADS, Matlab, etc.) for parasitic extraction and loss calculation of power electronics modules.
- Hands-on experience in building up and characterizing the performance of power electronics module by using various measuring tools, such as double pulse testing system, dynamic impedance analyzer, etc.
- Fluent in English, good written and oral communications skills.
- Strong team spirit and interpersonal skills.
- Independent, responsible, aggressive and outgoing character.
Please send your application to [email protected] with your resume (word format) with attaching the PhD certificate / supporting document from the University; you must quote the Job Ref No. and include the following information:
- Name of University
- PhD obtained/expecting and when
- Have you participated in ITF Project Internship Program before? Yes/No
- If you answer Yes in item 3, please state the period
- Have you been employed by ASTRI before? If yes, please state the period
- Academic referee
- Your R&D skills
- Your work experience, if applicable
Application Deadline: until this position is filled.
Only short-listed candidates will be notified. Personal data provided by applicants will be used for consideration of an application only. ASTRI reserves the right not to fill the position.