BLE SoC Architecture and System Design * RF transceiver architecture design for low cost, low power and high performance * Optimized digital baseband architecture for increased range and data throughput * System and modules specifications definition BLE Modules IP * Initial version RF transceiver IP design in terms of circuit schematic, netlist, simulation and layout * Initial version digital baseband IP in terms of algorithm, simulation platform and RTL code * Initial version analog and digital peripherals IP in terms of circuit schematic / RTL code, netlist, simulation and layout * Refined RF transceiver IP in terms of circuit schematic, netlist, simulation and layout * Refined digital baseband IP in terms of algorithm, simulation platform and RTL code * Refined analog and digital peripherals IP in terms of circuit schematic / RTL code, netlist, simulation and layout BLE SoC * Initial version of BLE 5 SoC engineering samples and evaluation boards * Refined version of BLE 5 SoC engineering samples and evaluation boards Reference Design * Reference design for the BLE 5 SoC
北京中電華大電子設計有限責任公司
東南大學
藍牙5是藍牙核心規格的重大更新，它為低功耗藍牙的性功能和效益帶來關鍵性提升。根據IndustryARC的市場研究，低功耗藍牙設備的出貨量可望於2020年達到84億，年復合增長率達到29％。隨著覆蓋範圍，速度，以及廣播信息容量上的提升，藍牙5成為了理想的短距離無線技術，在物聯網應用上開拓了新領域。本項目將會在射頻收發器，數字基帶以及其他知識產權的開發上採用創新關鍵技術，以達至目標性能。我們將會設計先進的射頻收發器架構，其中包括直接調製發射器，低中頻單轉換接收器及優化數字基帶，以達至理想的功率、成本和表現。至於新功能方面，2Mbps 物理層將會被開發以達到兩倍數據速度的提升，而低功耗長距離則把有效通信距離增加四倍。在整個計劃中，我們將透過兩次流片去開發支援藍牙5的低功耗藍牙系統芯片，同時提供參考設計。此項目將提供支援藍牙5標準的集成電路解決方案及知識產權產品組合。讓我們的客戶能藉著這更快速、更聰明和可靠的低功耗藍牙技術，捕捉這快速增長的市場。