應用於窄帶物聯網的系統芯片 (ART/241CP)

應用於窄帶物聯網的系統芯片 (ART/241CP)

應用於窄帶物聯網的系統芯片 (ART/241CP)
ART/241CP
平台
20 / 11 / 2017 - 19 / 09 / 2019
19,794

錢剛博士

System and Architecture Design for NB-IoT SoC - Advanced RF transceiver architecture design - Digital baseband architecture and algorithms design - SoC system, architecture and modules specification definition - SoC system and architecture design for high performance, low power and low cost - Control and interface definition Modules IP for NB-IoT SoC - Initial version of modules IP design in schematic, RTL, netlist, layout, GDSII and simulation results - Initial version modules including RF receiver, RF transmitter, frequency synthesizer, digital baseband, power management unit, control and interface logic, analog peripherals, digital peripherals and etc. - Refined modules IP design in circuit schematic, RTL, netlist, layout, GDSII and simulation results - Refined modules including RF receiver, RF transmitter, frequency synthesizer, digital baseband, power management unit, control and interface logic, analog peripherals, digital peripherals and etc. Engineering Samples of NB-IoT SoC - Initial version of engineering chip samples of NB-IoT SoC with test modules - Refined version of engineering chip samples of NB-IoT SoC with the typical performance targets as follows: 1) Supported Standard: NB-IoT standard in 3GPP Release 13 2) Modulation scheme: BPSK, QPSK 3) Frequency bands: 699-960MHz and 1710-2220MHz 4) System bandwidth: 200KHz 5) Receiver sensitivity: -109dBm 6) Receiver maximum input signal: -25dBm 7) Receiver gain control range: 85dB 8) Receiver gain step: 1dB 9) Maximum transmit power: 20dBm 10) Minimum transmit power: -40dBm 11) Transmitter gain control range: 60dB 12) Transmitter gain control step: 1dB for high output power and 6dB for low output 13) Error vector magnitude (EVM): 8% 14) Duplex mode: half duplex 15) Receiver chain number: 1 16) Transmitter chain number: 1 17) Control interface: SPI 18) Temperature: 25 ºC (Notes: BPSK: Binary Phase Shift Keying; QPSK: Quadrature Phase Shift Keying) Reference and Evaluation Board Design - Reference and evaluation board design for NB-IoT SoC in terms of schematic, layout, materials and substrate

北京松果電子有限公司
CEVA, Inc.
東南大學


根據Machina Research預測,到2024年將有大約50億應用於物聯網的裝置通過蜂窩網絡無線連接。鑒於物聯網市場的巨大潛力,3GPP於2016年6月在Release 13中發布了窄帶物聯網(NB-IoT)規範。作為 Release 13的一部分,NB-IoT是一個全球性規範,它是3GPP專門針對物聯網應用在低功耗、低成本、廣覆蓋和大容量等幾個方面做了全面優化。NB-IoT是一種能夠滿足物聯網要求的非常有前途的低功耗廣域通信技術。 在這個項目中,我們將為終端和傳感器節點開發支持NB-IoT規範的系統芯片(SoC)。這個系統芯片包括嵌入式DSP核、射頻收發機、數字基帶和其它的集成外設。系統芯片IP可以被授權給工業界以便其及時地抓住潛力巨大的物聯網市場。我們將開發多種創新技術,包括低中頻射頻接收机、極坐標發射機、集成CMOS功率放大器(PA)、片上降压/升压DC-DC转换器,高性能同步器和高性能调制解調器等等。 這個項目將非常有助於香港在物聯網領域建立並發揮技術領先的作用,幫助本地的晶片設計公司、物聯網解決方案公司、OEM和ODM的製造商創造競爭優勢。