Speed and Reliable Pass: High-Speed I/O System for EDA Cloud Computing
Technology Transfer & Commercialisation

Speed and Reliable Pass: High-Speed I/O System for EDA Cloud Computing

Silver Medal

Speed and Reliable Pass: High-Speed I/O System for EDA Cloud Computing

A novel dynamic gate-bias technique is proposed to implement a 3.3V output driver of CPU and ASIC chips using 1.8V devices, especially for advanced FinFET technology. The driver transmits signals with voltage level higher than their normal supply in order to support multi-voltage interfaces of other CMOS ICs in a micro-electronic systems. Comparing with conventional approach, the technique solves reliability issue and reduces driver area by 40% for speed and IC feature enhancement. End products include automotive ethernet interface, IP phone, network printer and broadband gateway.