叁维封装的可靠性工程

叁维封装的可靠性工程

  • 叁维封装的可靠性工程
    ART/053CP
    20080923 - 20100630
    13624

    仲镇华博士
    By the end of this full project, the following deliverables will be ready along with the samples of 3D packages: • Deliver a patentable PoP module with a warpage reduction of at least 50% and a stand-off height of 0.4mm vs. the existing PoP module using the developed virtual packaging design advisor (due by 31/12/2009); • Design documents and samples of stacked 3D system with a dimension of 12x12x3mm3 or less, including multi-functional chips (e.g., 1 digital, 1 RF, 4 memory, etc.) integrated using mixed interconnect technologies (e.g., WB, FC, TSV) (due by 30/06/2010); • Full set of validated key manufacturing process simulation models (i.e., molding, reflow, and underfill, etc.) for PoP-based 3D packages (due by 31/03/2009); • Full set of validated key manufacturing process simulation models (i.e., via drilling, via filling, and die bonding, etc.) for TSV-based 3D packages (due by 31/12/2009); • Full set of validated key reliability test simulation models (i.e., TC, humidity, preconditioning, and drop test, etc.) for PoP- and TSV-based 3D packages (due by 30/09/2009); • Demonstrate the functionalities of virtual packaging design advisor (e.g., process and reliability models, DFM and DFR guidelines, experimental techniques) for 3D packaging products/applications (due by 22/03/2010); • File at least four patents (due by 31/12/2009); • Technical reports on 3D packaging development status and trends, including worldwide 3D packaging related activities by key universities, RIs (Research Institutes) and MNCs (Multi-Nation Companies), patent mapping/strategy, market status and major applications (due by 31/03/2009).
    Akrometrix LLC [赞助机构] 华润安盛科技有限公司 [赞助机构] Beijing Faith Information Advisory Ltd. [赞助机构] 香港科技大学 [赞助机构] First MEMS [赞助机构] Flextronics International [赞助机构] 广东省粤晶高科股份有限公司 [赞助机构] 英特尔 [赞助机构] NXP Semiconductors Hong Kong Limited [赞助机构] 北京大学 [赞助机构] 华南理工 [赞助机构] Sin Yang [赞助机构] 中芯国际 [赞助机构] Solomon [赞助机构] WLCSP [赞助机构]

    叁维封装无疑是当前半导体工业中最先进的技术之一。为了实现电子产品的小型化和多功能﹐人们开发了叁种典型的叁维封装形式: 金线键合(WB)﹐封装叠层(PoP)和硅穿孔(TSV)。由於叁维封装是一个由多层材料叠合在一起而形成的複杂系统﹐在叁维封装的开发过程中﹐封装工业界遭遇到了越来越多的可製造性和可靠性问题。基於过去十年在二维封装中所建立的可靠性工程知识和过去几年在叁维封装中所积累的数据﹐本项目準备开发一个虚拟叁维封装设计顾问, 它包括虚拟製造和虚拟可靠性评估两个功能模块及整套叁维封装可製造性和可靠性设计準则﹐并用它来解决典型的封装叠层和硅穿孔叁维封装中相关的可製造性和可靠性问题。在此基础上﹐本项目将进一步开发一个新的封装叠层形式和一个新的硅穿孔叁维封装﹐并把它们应用到叁维系统的集成中。本项目的成果不仅可以帮助把香港和中国的叁维封装工业水準提昇到世界前列﹐而且还可以通过新技术应用和缩短产品开发週期增强封装工业的竞争力。