高速捷变的直接数字综合器

高速捷变的直接数字综合器

  • 高速捷变的直接数字综合器
    ART/140CP
    20121021 - 20150120
    12223

    严北平博士
    1) 1 GSPS (Sampling per second) DDS without internal clock (phase locked loop or PLL). All key blocks, including 32-bit DDS core, 12 bit high speed DAC, and efficient I/O interface, will be designed and verified based on CSMC 130 nm CMOS technology. 1 GSPS DDS samples without PLL will be delivered within the first 6 months. 2) 1 GSPS DDS with internal clock. A PLL circuit will be added in the above-mentioned 1GSPS DDS to facilitate the applications for clock source and siganl generation. 1 GSPS DDS IPs and samples with PLL will be delivered within 12 months. 1 GSPS DDS IPs include 1) 32-bit DDS core, 2) 12-bit high speed DAC, 3) efficient I/O and ESD interface, and 4) integrated 1 GSPS DDS. 3) 2 GSPS DDS without internal clock. All key blocks, including 32-bit DDS core, 12 bit high speed DAC, and high speed interface, will be designed and verified based on SMIC 65 nm technology. 2 GSPS DDS samples without PLL will be delivered within 15 months. 4) 2 GSPS DDS with internal clock. A PLL circuit will be added in the above-mentioned 2 GSPS DDS to facilitate the applications for clock source and siganl generation. 2 GSPS DDS IP and samples with PLL will be delivered within 21 months. 2 GSPS DDS IPs include 1) 32-bit DDS core, 2) 12-bit high speed DAC, 3) efficient I/O & ESD interface, and 4) integrated 2 GSPS DDS.
    王克中博士 邝国权先生 霍晓博士 陈中子博士 蔡小五博士 Miss Sidar Lai Mr Norman FOK Mr Chenxi Wei Mr Tao Sun Miss Nan Guo Mr Leung Ling Alan Pun Mr Gangjie Jacky Cai Mr Tat Fu Chan Mr Zuqiang Tang Mr Sze Wing, Brian Leung Mr Zhuqing Joe Feng
    华润上华科技有限公司 [赞助机构] 无锡华润上华半导体有限公司(特许授权) [赞助机构] 中国科学院微电子研究所 兴华半导体有限公司 兴华半导体(合同服务) 中芯国际 [赞助机构] 中芯国际 (特许授权) [赞助机构]

    软件无线电(SDR)是下一代无线通讯主要方向之一。它的基本思想就是利用软件编程方法在单个收发硬件平臺上实现不同标準,不同模式的数据交换和通讯。因为要求收发机实现数字编程,所以直接数字频率综合器(DDS)成为SDR的关键部件之一。本项目的目标是利用ASTRI所提出的算法和电路架构,设计并验證高速捷变的DDS芯片, 并将其IP授权与工业界使用。 所有设计将在EDA平臺上进行。利用特定Foundry提供的器件模型搭建DDS电路模块,在电路设计和仿真完成後,进行版图设计。完成版图设计後,通过後仿真再次确认电路功能。经过DRC/LVS检查无误後,完成试验芯片tape-out。实际电路功能验證将在试验芯片上测试和确认。 相对与传统的频率综合器而言,DDS是一项新技术。由於DDS是所有数字通讯系统不可缺少的组成部份,它将为未来的SDR通讯技术带来深远的影响。本项目所开发的DDS还可用于许多其它领域﹐ 如自动测试设备(ATE)﹐ 医学成像﹐电缆调制器﹐ 声纳浮标﹐ 和相控阵雷达系统。DDS 将会渗透到日常生活各个角落。