System-Level Virtual Prototyping of Embedded Systems

  • Performance-critical embedded systems consist of hardware, software and physical systems. In order to meet the sophisticated design requirements of these systems, ASTRI has developed innovative co-modelling technologies for systems-level virtual prototypes. The system architecture is based on the SAE AS5506B standard (Architecture Analysis and Design Language, AADL) and the AADL Behaviour Annex (INRIA Polychrony). Different types of simulation could be carried out at the system level, including Model-In-The-Loop (MIL) simulation, Software-In-The-Loop (SIL) simulation, and Hardware-In-The-Loop (HIL) simulation. System-level virtual prototyping involving an integrated simulation enables performance prediction of the system prior to constructing physical prototypes.

    System-Level Virtual Prototyping of Embedded Systems

    Wireless Power Transfer Technology

  • Wireless Power Transfer (WPT) means transferring electrical energy from the power source to the electrical device for charging of the battery and/or supporting the device operation without wire or conductor, by using magnetic field coupling which includes Magnetic Inductive Coupling and/or Magnetic Resonant Coupling. In general, all radio wave broadcasting system can be regarded as a kind of wireless energy transfer, but in WPT, the “power level” and “transfer efficiency” are much higher.


    ASTRI has developed the medium-range power transfer solution based on the magnetic coupling resonance theory. Our WPT system has a performance of transmitting power higher than 33W at up to 15cm and supporting the charging of multiple devices simultaneously. It can serve as the wireless power transfer technology platform for various electronic products and applications.



    • Medium charging range (up to 7~8 times of coil diameter)
    • Flexibility in position alignment
    • Multiple device simultaneously charging
    • High safety, non-radioactive and low inductive heat generation



    • Consumer Electronics, Smart Home, Sensor and Actuators, etc.
    • Others, e.g., Robotics, Electric Vehicle, Military, Unmanned Boat & Underwater Vehicle, Implanted Medical Devices, etc.


    ASTRI’s wireless charging demo kit


    Typical applications of WPT technology

    Advanced Power Electronics Technologies

  • Silicon-based technology ignited the development of the electronics industry in the last century, promoting the birth of Intel, IBM and some other world semiconductor giants in the “Silicon Valley”. Nowadays, 40% of the world’s energy consumption relates to the use of electricity which is mainly dissipated by power semiconductor devices, making power electronics to become the foundation of modern electronics industry. However, the traditional silicon-based power devices are hard to meet the demand of today’s needs for high efficiency, high density and high reliability to cope with harsh environment and lightweight miniaturization. The 3rd generation semiconductors represented by GaN (Gallium Nitride) and SiC (Silicon Carbide) have emerged a breakthrough and are widely adopted as the next generation power solutions for a range of industries such as data centers, 5G, EV/HEV, robotics, smart energy, smart grid, smart transportation, smart mobility, smart manufacturing and etc., to support national/local governments’ initiatives of energy conservation and environmental protection, and all the related technologies could be classified as the advanced power electronics (APE).


    According to the market research data published by Global Market Insights, global power electronics market share is forecasted to surpass US$ 45 billion by 2024, and the Asia-Pacific (APAC), especially China, is expected to hold the largest share of the power electronics market for its emergence as a strong manufacturing hub with increasing innovation and manufacturing activities. Moreover, the development of the 3rd generation semiconductor devices and the associated packaging and applications are one of the major political directions in China’s 13th and 14th Five-Year Plan, which is expected to play a leading role in the implementation of national strategies as “Made in China 2025” and “the Belt and Road”. The Electronics Components Technology Division has more than 3 years collaboration with China Advanced Semiconductor Industry Innovation Alliance (CASA), which is the corresponding organization for policy formulation and project implementation, and it has been recognized as the vice-director unit bridging the Mainland and oversea.


    With a special focus on the application of the advanced power electronics technologies by adopting the 3rd generation semiconductor devices, a series of technology platforms have been successfully constructed in the past 5 years, which comprises:


    1. 3D High Power Electronics Platform

    Based on the 3D wirebondless packaging technology and the large-scale molding technology, a novel fully-molded 3D wirebondless packaging format with dual-side-cooled thermal interface was successfully demonstrated in 2015 to overcome the bottlenecks of thermal and reliability induced by the wirebonded interconnects. It is an ideal packaging platform for the 3rd generation semiconductor devices to be used in EV/HEV and the technology was protected by 6 US/CN patents.


    2. Integrated Power Modules Platform

    By adopting the System-in-Package technology of the device, substrate and module levels,

    ASTRI has successfully developed an integrated power module with improved power density, electrical and thermal performance for the next generation networking and telecommunication equipment. All the developed platform technologies, including design, modeling & simulation, process recipes and testing capabilities, were successfully transferred to the industry co-applicant to achieve the mass production in their own production line, and were protected by 5 CN patents as well.


    3. GaN-based High Density Power Conversion Platform

    This technology platform aimed to develop a novel modularized power switching package by proposing the “Vertical-Driver-GaN (VDG)” packaging technology to solve the concurrent high speed & high efficiency switching of the gate driver and the long term interconnect reliability challenges in the implementation of GaN (Gallium Nitride) power device for the next generation power conversion applications, such as DC-DC power modules widely adopted in the data centers, telecommunication equipment, robotics, military and aerospace industries. Part of the products specifications were collected in the technology roadmap for the 3rd generation semiconductor power electronics published by CASA in 2018, and all the developed technologies were protected by 10 US/CN patents.


    4. 3D-SiP Pilot Line

    As the foundation to develop the above-mentioned platform technologies, a power semiconductor packaging pilot assembly line was setup together with the HKSTP in 2014. There were 24 sets of major equipment in the line to support the process development of the new packages and products, technology transfer to the customers and small volume production for the local industries.


    ASTRI’s Advanced Power Electronics Products & Solutions
    ASTRI’s System-in-Package Pilot Line

    High Density Interconnect Substrate Technology

  • Microvia Electroplating Additives for Next-generation High-density-interconnect Substrate

    Microvia in high-density-interconnect (HDI) substrate for system integration offers a number of advantages, such as performance improvement and product miniaturisation. Electroplating additives are essential for copper electrodeposition fabrication of microvias in HDI substrate. The technology-intensive additives can only be provided by a few electronic material companies and at a very high profit margin. As the trend of miniaturisation and increased functionality of advanced electronics continues, higher technical requirements including thinner surface deposition and smaller dimple are introduced for the next-generation microvia (<75µm) fabrication, and hence new electroplating additives are in high market demand.

    Guided by our mechanism-based electroplating simulation software, ASTRI has developed a methodology for fast screening of electroplating additive candidates to shorten the material development cycle time and reduce the development cost. Based on this methodology, a series of new electroplating suppressors with tuned molecular weight distribution and new electroplating levelers with lower mass-to-charge ratio and balanced functional groups have been developed to meet the above-mentioned requirements for microvia fabrication and to achieve better electroplating performances than that of existing commercial additives.


    • Dimple size less than 5µm; Cu thickness as thin as 10µm
    • High T/P performance of through hole filling
    • Excellent adhesion, uniformity and reliability
    Deposition performance of ASTRI additives for microvias of Ф50µm & Ф30µm




    • High density, multi-layer, ultra-thin HDI PCB for advanced electronic devices (for examples, smartphones, wearable devices, etc.)
    • Fine pitch IC substrate for high I/O and high speed chips (including micro-processors, memory chips, etc.)
    ASTRI’s additives for high density substrate

    Etching additives for Next-generation High-density-interconnect Substrate

    The demand for finer line/space pattern formation of high density interconnect (HDI) substrates has replaced conventional subtractive circuit formation with semi-additive process (SAP) and modified semi-additive process (MSAP) technologies as the mainstream circuit production technologies. These advanced technologies however still face many challenges and have room for improvement. Two of the challenges for MSAP technologies are copper electrodeposition for signal line formation, blind microvia and through hole filling, and the flash etching which is to finalize the circuit formation by removing the copper seed layer through differential etching.

    ASTRI has developed its novel etching additives to overcome the severe undercut issue due to narrower and higher aspect-ratio etch channels for fine circuitry. The newly designed banking agent can enhance efficiency of etching inhibition at channel sidewall. An accelerator is employed at the channel bottom to speed up the etching rate and working hand in hand with the banking agent to minimize undercut. In addition, a new electrodeposition recipe has been developed for both blind microvia and through hole filling to meet the market demand on one electrodeposition solution/cell for multi-tasks. The development of the etching additives and the recipes can be widely used in high-density interconnect applications.


    • H2O2, H2SO4 based flash etchant for fine circuit etching
    • Suitable for SAP/MSAP process
    • L/S can reach 15µm/15µm
    • High etch factor, no undercut
    • Short etch time, high etch rate
    • Good surface morphology and trace uniformity


    • High density, multi-layer, ultra-thin HDI PCB for advanced electronic devices (smartphones, wearable devices, etc.)
    • Fine pitch IC substrate for high I/O and high speed chips (micro processors, memory chips, etc.)


    Rectangular shape of lines after etching by using ASTRI’s banking agent


    Good uniformity and surface roughness


  • Advanced Lithium Ion Battery (LIB) Technology

    To cope with the power demand of new power consuming electronics, breakthroughs must be made in the development of lithium-ion battery (LIB) technology, including enhancing battery capacity and safety and reducing its size and weight. These requirements create the need for new materials research and development.

    High Capacity Active Materials

    ASTRI focuses its efforts on developing the next generation tin based anode material and lithium rich cathode material for lithium-ion batteries, which are expected to be impactful components for increasing the energy density of future LIBs. Their advantages of high energy density characteristics, competitive material cost and low environmental impact are important for commercial applications.


    • Lithium rich Ni-Mn cathode active material
    • Sn-based anode active material
    • Compatible with battery specification requirements
    • Energy density increases while active material cost goes down


    • Popular electronics
    • Wearable electronics
    • Advanced electronics
    • Mobile fan, Drone, Camera
    LIB technology applications
    LIB material technology


    Self-shutdown Layer in the LIB

    The safety of LIB is a big concern of the general public. With increasingly applications of LIB, the safety of LIB draws much more attentions than before. ASTRI focuses on developing a self-shutdown layer in the LIB to interrupt the cell reaction through the pores close-up when adverse temperature is sensed in the battery. In other words, the chain reactions in the battery can be inhibited and the dangerous flaming and explosion can be avoided.


    • Support great adhesion between separator and electrodes
    • Self-shutdown layer to control overheating in the cells


    • Light electric-drive vehicles
    • Unmanned aerial vehicles/Robot
    • Household appliances
    • Phone, computer, other consumer electronics
    Porous coating layer


    Low self-shut-down temperature