WPT means transferring electrical energy from the power source to the electrical device for charging of the battery and/or supporting the device operation without wire or conductor, by using magnetic field coupling, including Magnetic Inductive Coupling and/or Magnetic Resonant Coupling. In general, all radio wave broadcasting system can be regarded as a kind of wireless energy transfer, but in WPT, the “power level” and “transfer efficiency” are much higher.
ASTRI has developed the medium-range power transfer solution based on magnetic coupling resonance theory. Our design of the WPT module has a performance of transmission power higher than 33W, charging distance larger than 15cm, and supporting multiple device simultaneously charging. It can serve as a wireless power technology platform for various electronic products and applications.
Medium range (up to 7 or 8 times of coil diameter)
Flexibility in position alignment
Multiple device simultaneously charging
High Safety, non-radioactive, low inductive heat generation
Consumer Electronics, e.g., home, street, car, etc.
Others, e.g., automobile, robotics, military, implanted medical device, etc.
ASTRI’s 3D packaging platform has established a full set of 3D packaging solutions, including package design (e.g., PoP, TSV, etc.), process modeling and optimisation (e.g., via formation, via filling, etc.) and performance characterization for different electronics product applications (e.g., memory, CIS, etc.).
Software for 3D Interconnect Fabrication
3D-IC is expected to be widely applied in many electronics components, e.g., memory, CMOS image sensor (CIS), radio frequency integrated circuits (RFIC), micro-electro-mechanical-system (MEMS), etc. Copper electroplating, as the major process of 3D interconnect fabrication, is influenced by many parameters including geometry, electrochemistry and physics, therefore, it is very time-consuming and expensive for the industry to use the trial-and-error method to determine the optimal process recipe window.
ASTRI has developed a software for modeling and simulation of the copper electroplating process to determine the optimal process window for 3D interconnect fabrication, and further shorten the time-to-market of 3D-IC based electronics products. The software, embedding validated numerical models and including four key modules (i.e. user interface, computational engine, optimal process window and result visualization), is able to achieve higher than 90% accuracy of process optimisation window.
Computational engine for via- & wafer-level simulation and copper electroplating process optimization
2D and 3D simulation result visualization
On-line or off-line simulator of copper electroplating process optimization for TSV manufacturers
On-line predictor of optimal process windows for electroplating equipment vendors
Off-line simulator for new additive development for TSV electroplating material suppliers
TSV CMOS Image Sensor Wafer Level Packaging
The polymer isolation-based TSV CMOS image sensor is the first low-cost image sensor for TSV which is used successfully for 0.3MP and 5MP with yield more than 95%. It takes advantage of low temperature deposited polymer isolation layer such that the production yield is significantly improved without scarifying its performance while comparing with other CIS packaging techniques.
Low cost and mature production process
Low thermal budget technology for the TSV isolation layer – Room temperature chemical vapor deposition (CVD) polymer isolation
Specialised wafer level packaging design for hermetic or near hermetic performance
Capable for most industrial reliability standards
Wireless IC applications such as memory and processor in handheld device
Power semiconductors are primarily used as high switching speed and long lifetime commutation switches in the circuits of inverters and converters, which have been widely utilised in home appliances, electric vehicles, wind and solar power, etc. Apart from the design of the device, electronics packaging plays a crucial role in determining the electrical, thermal and reliability performance of the final products.
Based on the 3D wirebondless packaging technology, ASTRI has successfully developed a new type of IGBT (Insulated Gate Bipolar Transistor) power electronics module, and combining the large-scale molding technology, a fully-molded 3D wirebondless packaging format was developed in 2015 to overcome the bottlenecks caused by wirebonded interconnects.
Compared to conventional wirebonded module that normally contains heavy aluminum wires as interconnects, ASTRI’s technologies can reduce the parasitic parameters by an order to reduce its overshoot voltage, and provide a double-side cooling interface to enhance its overall heat dissipation performance. In addition, a power semiconductor packaging pilot assembly line, which includes the traditional heavy aluminum wire bonder, vacuum reflow oven and the newly imported ultrasonic welder for bus bar assembly, has been established. It targets to:
Transfer the total solution with the process recipes to the customers.
Provide support for production of small volume of IGBT modules to the industry.
In the meantime, our team also provides package/system-level multi-physical coupling design, analysis and test services, such as the extraction of parasitic parameters, evaluation of thermal resistance, optimisation of electrical, thermo-mechanical performances and the packaging-related material characterisations.
Current density: ≥10kW/cm3
Switching loss reduced by: ≥40%
Thermal resistance (junction-to-case): 0.1ºC/W
Life time: 10+ years
High speed train
Data communication equipment
Integrated Power Module (IPM)
Power module is the core component of the power supply unit (PSU). Its main function is to convert electricity from the grid to various applications at different voltage and current levels. The highly integrated and compact power modules can improve the system performance and long time reliability by delivering increased power density, power conversion efficiency and better thermal solutions.
ASTRI has successfully developed an integrated power module of single package format for the applications ranging from telecommunication and network, railway, aerospace, medical and industrial equipment. It incorporates three-level integration by adopting the system-in-package technology to: (i) embed small passive components in Low Temperature Co-fired Ceramic (LTCC) substrate; (ii) integrate switching devices, drivers and control/sensing circuits in the package; (iii) integrate large passive components in the package. Compared to the market available solutions, the power density of this integrated power module has been improved by 500% whereas maintaining the same IO arrangement as required by the industrial/military standards, while our advanced thermal design makes its heat dissipation efficiency doubled so as to fulfill the future demands in the high energy consumption fields.
1/8 or 1/4 brick format that fulfils industrial standard
Input voltage range 36V-75V
Output voltage 3.3V-12V
Output current 0-33A
High efficiency ~95% & high power density
Wide operation temperature range -55°C ~100°C
Excellent thermal solution
Telecommunication and network, high performance server, microprocessor
Industrial equipment, railway, medical and aerospace
Others special requirements for high power density, power conversion efficiency and thermal performance
Microvia Electroplating Additives for Next-generation High-density-interconnect Substrate
Microvia in high-density-interconnect (HDI) substrate for system integration offers a number of advantages, such as performance improvement and product miniaturisation. Electroplating additives are essential for copper electrodeposition fabrication of microvias in HDI substrate. The technology-intensive additives can only be provided by a few electronic material companies and at a very high profit margin. As the trend of miniaturisation and increased functionality of advanced electronics continues, higher technical requirements including thinner surface deposition and smaller dimple are introduced for the next-generation microvia (<75µm) fabrication, and hence new electroplating additives are in high market demand.
Guided by our mechanism-based electroplating simulation software, ASTRI has developed a methodology for fast screening of electroplating additive candidates to shorten the material development cycle time and reduce the development cost. Based on this methodology, a series of new electroplating suppressors with tuned molecular weight distribution and new electroplating levelers with lower mass-to-charge ratio and balanced functional groups have been developed to meet the above-mentioned requirements for microvia fabrication and to achieve better electroplating performances than that of existing commercial additives.
Dimple size less than 5µm; Cu thickness as thin as 10µm
High T/P performance of through hole filling
Excellent adhesion, uniformity and reliability
High density, multi-layer, ultra-thin HDI PCB for advanced electronic devices (for examples, smartphones, wearable devices, etc.)
Fine pitch IC substrate for high I/O and high speed chips (including micro-processors, memory chips, etc.)
Etching additives for Next-generation High-density-interconnect Substrate
The demand for finer line/space pattern formation of high density interconnect (HDI) substrates has replaced conventional subtractive circuit formation with semi-additive process (SAP) and modified semi-additive process (MSAP) technologies as the mainstream circuit production technologies. These advanced technologies however still face many challenges and have room for improvement. Two of the challenges for MSAP technologies are copper electrodeposition for signal line formation, blind microvia and through hole filling, and the flash etching which is to finalize the circuit formation by removing the copper seed layer through differential etching.
ASTRI has developed its novel etching additives to overcome the severe undercut issue due to narrower and higher aspect-ratio etch channels for fine circuitry. The newly designed banking agent can enhance efficiency of etching inhibition at channel sidewall. An accelerator is employed at the channel bottom to speed up the etching rate and working hand in hand with the banking agent to minimize undercut. In addition, a new electrodeposition recipe has been developed for both blind microvia and through hole filling to meet the market demand on one electrodeposition solution/cell for multi-tasks. The development of the etching additives and the recipes can be widely used in high-density interconnect applications.
• H2O2, H2SO4 based flash etchant for fine circuit etching
• Suitable for SAP/MSAP process
• L/S can reach 15µm/15µm
• High etch factor, no undercut
• Short etch time, high etch rate
• Good surface morphology and trace uniformity
• High density, multi-layer, ultra-thin HDI PCB for advanced electronic devices (smartphones, wearable devices, etc.)
• Fine pitch IC substrate for high I/O and high speed chips (micro processors, memory chips, etc.)
To cope with the power demand of new power consuming electronics, breakthroughs must be made in the development of lithium-ion battery (LIB) technology, including enhancing battery capacity and safety and reducing its size and weight. These requirements create the need for new materials research and development.
High Capacity Active Materials
ASTRI focuses its efforts on developing the next generation tin based anode material and lithium rich cathode material for lithium-ion batteries, which are expected to be impactful components for increasing the energy density of future LIBs. Their advantages of high energy density characteristics, competitive material cost and low environmental impact are important for commercial applications.
Lithium rich Ni-Mn cathode active material
Sn-based anode active material
Compatible with battery specification requirements
Energy density increases while active material cost goes down
Mobile fan, Drone, Camera
Self-shutdown Layer in the LIB
The safety of LIB is a big concern of the general public. With increasingly applications of LIB, the safety of LIB draws much more attentions than before. ASTRI focuses on developing a self-shutdown layer in the LIB to interrupt the cell reaction through the pores close-up when adverse temperature is sensed in the battery. In other words, the chain reactions in the battery can be inhibited and the dangerous flaming and explosion can be avoided.
Support great adhesion between separator and electrodes
Self-shutdown layer to control overheating in the cells