低成本多標準(H.264/AVS/MPEG2)高性能, 全高清解碼器核SoC

低成本多標準(H.264/AVS/MPEG2)高性能, 全高清解碼器核SoC

  • 低成本多標準(H.264/AVS/MPEG2)高性能, 全高清解碼器核SoC
    ART/062CP
    20090623 - 20110922
    18484

    趙盛章博士
    (1)Ready for production Multi-Standard Low Cost High Perfornance SoC - Fully compliant H.264/AVS/MPEG2 video decoders - Real Time Full HD - 1920X1080P - DDR2 Controller - HD 1080P display controller - TS DeMux Video Stream Processor - Audio Processor - Peripherals: I2C, I2S, Ethernet, IDE, GPIO, UART, 32-64 Bridge (2)Reference platform Video decoder H.264/AVS/MPEG2 SoC running on a PCB platform - Completely specified for low cost final STB product - RTOS and all the necessary peripheral drivers (3) Software Development Kit (SDK) and Software Drivers - Linux OS Porting - Audio Driver/firmware -OSD graphic driver/firmware -TS-Demux Driver/firmware -Video Decoder driver/firmware -Remote Controller driver/firmware -I2C driver/firmware -Android OS porting

    低成本多標準(H.264/AVS/MPEG2)高性能, 全高清解碼器核SoC項目的目標是設計一款SoC用以完成全高清,多標準(H.264/AVS/MPEG2)的視頻信號解碼。其應用領域爲消費電子類終端設備,例如高清/標清電視機頂盒。機頂盒設備至少包含三部分:(1)射頻及基帶處理器,完成空中信號的接收;(2)高清數字視頻信號解碼單元,完成對接收到的視頻信號的解碼;(3)顯示設備,如高清電視屏幕/監視器/控制盤等,用以重構可以愉悅大衆的連續高清視頻圖像。