Wireless Sensor Network Signal Processing Platform

Wireless Sensor Network Signal Processing Platform

  • Wireless Sensor Network Signal Processing Platform
    ART/133CP
    20120401 - 20131231
    13350

    Mr David Kwong
    1. 0.18um Analog Front End (AFE) IP block consists of a programmable gain amplifier, a bandgap reference, a 12 bit resolutions DAC and a 8-channel 12-bit resolution ADC. 2. A 0.18um wireless sensor signal processing SoC with the Analog Front End together with a ARM Cortex M0 RISC processor. 3. 0.13um Analog Front End (AFE) IP block consists of a programmable gain amplifier, a bandgap reference, a 12 bit resolutions DAC and a 8-channel 14-bit resolution ADC. 4. A 0.13um wireless sensor signal processing SoC with the Analog Front End together with a ARM Cortex M0 RISC processor. 5. PCB demo module of e-health application (based on 0.13um wireless sensor signal processing SoC) to enable licensees to develop WSN products 6. PCB demo module of green energy application (based on 0.13um wireless sensor signal processing SoC) to enable licensees to develop WSN products 7. Full design documentation and application notes for end users.

    A wireless sensor network (WSN) signal processing platform is proposed here to handle various sensors interfaces for e-health and energy monitoring applications. The platform consists of a high precision, low power Analog Front End (AFE) block; a high performance digital signal processor with interface to an external wireless Radio Frequency Transceiver, such as Bluetooth or ZigBee RFIC.