Reliability Engineering for 3D Packaging (REF3D)
20080923 - 20100630
Dr Tom Chang-hwa Chung
By the end of this full project, the following deliverables will be ready along with the samples of 3D packages: • Deliver a patentable PoP module with a warpage reduction of at least 50% and a stand-off height of 0.4mm vs. the existing PoP module using the developed virtual packaging design advisor (due by 31/12/2009); • Design documents and samples of stacked 3D system with a dimension of 12x12x3mm3 or less, including multi-functional chips (e.g., 1 digital, 1 RF, 4 memory, etc.) integrated using mixed interconnect technologies (e.g., WB, FC, TSV) (due by 30/06/2010); • Full set of validated key manufacturing process simulation models (i.e., molding, reflow, and underfill, etc.) for PoP-based 3D packages (due by 31/03/2009); • Full set of validated key manufacturing process simulation models (i.e., via drilling, via filling, and die bonding, etc.) for TSV-based 3D packages (due by 31/12/2009); • Full set of validated key reliability test simulation models (i.e., TC, humidity, preconditioning, and drop test, etc.) for PoP- and TSV-based 3D packages (due by 30/09/2009); • Demonstrate the functionalities of virtual packaging design advisor (e.g., process and reliability models, DFM and DFR guidelines, experimental techniques) for 3D packaging products/applications (due by 22/03/2010); • File at least four patents (due by 31/12/2009); • Technical reports on 3D packaging development status and trends, including worldwide 3D packaging related activities by key universities, RIs (Research Institutes) and MNCs (Multi-Nation Companies), patent mapping/strategy, market status and major applications (due by 31/03/2009).
Akrometrix LLC [Sponsor] ANST [Sponsor] Beijing Faith Information Advisory Ltd. [Sponsor] Electronic Packaging Laboratory, Centre for Advanced Microsystems Packaging, The Hong Kong University of Science and Technology [Sponsor] First MEMS [Sponsor] Flextronics International [Sponsor] Guangdong Yuejing High Technology Co. Ltd. [Sponsor] Intel [Sponsor] NXP Semiconductors Hong Kong Limited [Sponsor] PKU [Sponsor] SCUT [Sponsor] Sin Yang [Sponsor] SMIC [Sponsor] Solomon [Sponsor] WLCSP [Sponsor]
3D packaging is definitely one of the hottest research topics in semiconductor industry. Three kinds of 3D packaging, i.e., wire bonding (WB), package-on-package (PoP) and through-silicon-via (TSV), have been developed to meet the miniaturization requirements of electronics products. Since 3D packaging is a multi-layered materials bonded complicated system, the packaging industry encounters more and more manufacturability & reliability issues in the development of 3D packages. In this project, based on the knowledge of reliability engineering established for 2D packaging in last decade and the database built for 3D packaging in past few years, a virtual 3D-packaging design advisor, which consists of two key components of virtual manufacturing and virtual reliability assessment and a full set of design for manufacturability (DFM) and design for reliability (DFR) guidelines, will be developed and applied to address the manufacturability and reliability issues in PoP and TSV packages. As a result, a new PoP package and a new TSV package will be developed and demonstrated for 3D system integration. The success of this project can not only promote Hong Kong and China’s microelectronics packaging industry to an advanced position but also enhance the industry’s competitiveness through shortening time-to-market and adopting new packaging technologies.