Multi-Mode Mobile TV Baseband + Media Processor SoC
20100628 - 20111228
Mr Felix Chow
The project deliverables are listed in the following. • Technical Specifications –Architecture Specifications –Micro-architecture Specifications • Hardware development (Interfaces and power management unit) - RTL coding - Verification, synthesis and floor-planning • Multi-mode Baseband + Media Processor Test Chip –Functional multi-mode demodulator IC samples –Show CMMB, DVB-TH and T-DMB functionality running on demo platform. • 1-2 Patents Ready to Apply –Hardware implementation innovation in integration, power optimization. (e.g. special memory organization to increase bandwidth/memory usage and power efficiency, hardware features for testability.) • Industry contribution and sponsorship
Nationz Technologies Inc. Service & Quality Technologies Co Ltd ShenZhen SemiTech Solomon Systech Ltd. Vimicro Inc. Yspring Technology
Mobile TV industry is moving towards RF+Baseband or Baseband + Media Processor Integrations. This project leverages our Multi-Mode Baseband demodulator technology developed in previous Multi-Mode Baseband full project and Media Processor technology developed by our partners to deliver a Multi-Mode Baseband + Media Processor SoC (System-on-Chip). The Korean T-DMB and the European DVB-H Mobile TV standards are currently the most successful commercially deployed digital TV standards in the world. CMMB has become extremely popular in mainland China especially after the 2008 Olympics Games were broadcasted live in many major mainland cities through CMMB. In order to capture this sizeable and rapidly growing Mobile TV market, this project aims at delivering a Multi-Mode Mobile Digital TV Baseband + Media Processor SoC. Our unique Multi-Mode SoC solution will be the first Single-Chip Multi-Mode demodulator combined with Media Processor solution that supports the Chinese CMMB, Korean T-DMB and the European DVB-TH mobile TV standard standards. ASTRI has a veteran team of ASIC design engineers to integrate the baseband and media processor cores into silicon. Our design will be optimized for both die size and power. Chip makers and handheld device manufacturers in the Pearl River Delta region as well as other countries will benefit from the technology developed by this project.