Multi-Media Platform for Algorithm & Application Development (MMP-EMU)

Multi-Media Platform for Algorithm & Application Development (MMP-EMU)

  • Multi-Media Platform for Algorithm & Application Development (MMP-EMU)
    ART/009CP
    20061125 - 20080224
    14614

    Dr Shen-chang Chao
    Combining Phase-1 and Phase-2: 25/11/2006 - 25/02/2007: Completion of H.264 Main Profile and High Profile Algorithm & Architecture Design. 26/02/2007 - 25/08/2007: Completion of Preliminary H.264 Main Profile and High Profile FPGA RTL Code. 25/11/2006 - 25/08/2007: Completion of Emulation Platform Hardware Board 26/08/2007 – 25/11/2007: Commitment of 10% contribution of the full project 26/08/2007 – 25/11/2007: H.264 FPGA Module Level Integration and Testing 26/08/2007 – 24/02/2008: Fine Tuning the H.264 FPGA in terms of performance and cost. 26/08/2007 – 25/01/2008: Porting of Linux and drivers on the Emulation Platform 26/01/2008 – 24/02/2008: Completion of Demo Software, Hardware, FPGA debugging, Conformance Testing and Performance Tuning.
    BellTech Co. Ltd e3C Inc. Hisense Hiview Tech Co., Ltd. Shanghai Branch [Sponsor] Lestina International (Distributor of Sigma Design) [Sponsor]

    This Project is a collaborative project between the Enterprise and Consumer Electronics (ECE) Group and the IC Designs (ICD) Group in ASTRI. The project is to achieve different goals for the different teams, however, there are significant synergies between the groups that allow us to establish a Technology Center of Excellence for Multi-Media applications in a complete set of advanced technology research, algorithm and architecture developments, system & application, SoC IP creation. The project will be jointly developing H.264 Main Profile and High Profile IPs in hardware FPGA/RTL format with ECE, implementing the H.264 codec solutions from PC software or programmable processor based solutions to hardware FPGA /RTL format and Emulation Platform for Algorithm, Hardware & Software IP development.