High Efficient Video Post Processing Silicon IP for Digital TV
ART/097CP
20100901 - 20130901
20779
Dr Shen-chang Chao
1. Digital TV FPGA reference design platform with
(a) 65nm ASTRI VPP FPGA/ test chip
(b) Analog TV decoder
(c) TCON
(d) DTV NIM
(e) ATV tuner
2. VPP test chip with
(a) CPU + ASTRI H.264 decoder IP
(b) DeInterlace
(c) Frame rate conversion
(d) DeNoise
(e) Color Enhancement
(f) Sharpness Enhancement
(g) Image up/down scaling
(h) Zooming for PiP (Picture in Picture)
3. Android based DTV design platform SDK
Video Post-Processing Technology (VPP) is used by the video and film industry to improve subjective video quality of playback devices. This project focuses on the research and development of a silicon proven video post-processing IP suite for DTV. The main features of this IP suite include: Video DeInterlacing, Frame Rate Conversion (from 30fps to 120fps), Image DeNoising and Color Enhancement (Contrast enhancement, Brightness adjustment, and Saturation adjustment), Sharpness enhancement, Image Up and Down Scaling, and other image enhancement processing. The result of this project enables ASTRI to develop its own digital TV platform which significantly improves the subjective video quality and at the same time providing a low cost full-feature digital TV total solution for Hong Kong and China Mainland TV manufacturers.