Bluetooth Low Energy (BLE) System on Chip (SoC) Feasibility – RF Transceiver Front End Architecture and BaseBand (BB) FPGA Implementation

Bluetooth Low Energy (BLE) System on Chip (SoC) Feasibility – RF Transceiver Front End Architecture and BaseBand (BB) FPGA Implementation

  • Bluetooth Low Energy (BLE) System on Chip (SoC) Feasibility – RF Transceiver Front End Architecture and BaseBand (BB) FPGA Implementation
    ARD/126
    20130701 - 20131231
    1950

    Mr David Kwong
    Dr K C Wang Ms Karen Wan Dr Zuqiang Tang Mr Xiaoxiang Li Mr K C Wan Ms Gigi Chan Ms Sidar Lai Mr Edward Wong Mr Tat Fu Chan