Stereoscopic Image Signal Processor (SISP)
20120323 - 20140521
Mr Yiu-kei Li
Algorithms Design • Depth estimation & Video format conversion IPs and corresponding documentation • Performance and simulation models for depth estimation & Video format conversion Reference IC Implementation • Frontend logical database(RTL) in Verilog format • Physical layout in GDSII format • Reference IC with processor core and peripherals • Hardware spec, Implementation and verification documents Development Platform • FPGA development board for IP verification • Reference IC test board and development platform
Stereoscopic (3D) displays have become more popular in recent years due to the improvement in display technologies. There is a growing demand of 3D display content and therefore 3D camcorders and similar video capturing devices would be the next hit in consumer electronics. The IC industry needs an efficient and cost-effective stereoscopic image signal processor hardware that can facilitate the video processing of concurrent images from multiple cameras. This processor hardware can generate output in multiple formats to serve various requirements of video encoders and 3D displays.