Senior Manager / Principal Engineer, PMIC Design

Job Description


Job Responsibilities

  • To assist the Director to understand the needs of local power electronics industries on the power management IC / driver IC and develop corresponding business plan and strategy
  • To assist the Director to define the power management IC development roadmap and apply for ITF/industry projects based on the business plan and strategy
  • Lead the power management IC design team to implement ITF/industry projects and develop various of state-of-the-art power management IC solutions for smart city applications


  • PhD holder or Master’s degree in Electronic Engineering or relevant disciplines with a minimum of 6 years of related experiences. Candidates with less experiences may also be considered.
  • Knowledge in analog IC design including simulation, layout, and test chip evaluation is a must, especially for the power management IC and/or driver IC.
  • Hands-on experience in IC development tools, such as Virtuoso, Spectre, Calibre, Pspice, Cadence, and Hspice.
  • Strong team spirit with independent, responsible, positive, and outgoing character. Excellent communication and interpersonal skills.
  • Proficient in written and spoken English required
  • Live ASTRI values.


The appointment will be on renewable contract terms with a competitive salary and performance-linked variable pay. Fringe benefits include paid leave, medical and dental benefits, insurance coverage and contribution to MPF. The incumbent will normally work a five-day week.

Interested candidates, please send an application (quoting Ref. No.) with a detailed resume, current and expected salary to Talent Acquisition via email to [email protected]

The application will be open until the position is filled. Only short-listed candidates will be notified. ASTRI reserves the right not to fill the position.

ASTRI is an Equal Opportunities Employer. Personal data provided by job applicants will be used exclusively for recruitment only.