- Responsible for schematics and layout design of mixed signal IC, including all facets of design flow, from schematics to layout, from initial floor-planning to final verification.
- Develop new building blocks to cater for the requirements for speed, area and power consumption.
- Develop new algorithm and solutions for high-speed data transmission applications
- Work with team members and possess the ability to work closely with management team to meet or exceed design schedules
- Ph.D or master degree in Electronic Engineering or related disciplines with minimum 3 years relevant experience. Candidates with less experience may be considered.
- Extensive experiences in mixed signal IC design, strong background in high-speed interface, ADC, DAC or PLL design will be a plus
- Familiar with Cadence/Mentor/Synopsys EDA tools; strong capability in programming using language such as SystemC, Verilog, Skill, or TCL (Tool Command Language)
- Good experiences in ESD, IO or standard cell library design
- Good communication and interpersonal skills, a good team player
- Live ASTRI values
The appointment will be on renewable contract terms with a competitive salary and performance-linked variable pay. Fringe benefits include paid leave, medical and dental benefits, insurance coverage and contribution to MPF. The incumbent will normally work a five-day week.
Interested candidates, please send an application (quoting Ref. No.) with a detailed resume, current and expected salary to Talent Acquisition via email to [email protected]
The application will be open until the position is filled. Only short-listed candidates will be notified. ASTRI reserves the right not to fill the position.
ASTRI is an Equal Opportunities Employer. Personal data provided by job applicants will be used exclusively for recruitment only.