Senior Engineer / Engineer, Mixed Signal IC Design

Job Description


Job Responsibilities

  • Responsible for schematic design and layout drawing of mixed signal IC, including all facets of design flow, from schematics to layout, from initial floor-planning to final verification.
  • Develop new building blocks to cater for the requirements for speed, area and power consumption.
  • Develop new design technique and solutions for low power and high-speed applications.
  • Work with team members and possess the ability to work closely with management team to meet or exceed design schedules.


  • Bachelor’s Degree in Electronic Engineering or related fields with 6 years relevant experience. Master’s degree with 3+ years’ experience, or PhD holder with less experience. Candidates with less experience will be considered as Engineer.
  • Strong background in GPIO design and verification, the experience in high speed interface such as LVDS/MIPI/eMMC will be a plus.
  • Familiar with Cadence/Mentor/Synopsys EDA tools; strong capability in programming using language such as Verilog, Skill, or TCL (Tool Command Language).
  • Good experiences in mixed signal IC design such as PLL and ADC.
  • Good communication and interpersonal skills, a good team work player.


The appointment will be on renewable contract terms with a competitive salary and performance-linked variable pay. Fringe benefits include paid leave, medical and dental benefits, insurance coverage and contribution to MPF. The incumbent will normally work a five-day week.

Interested candidates please send application (quoting Ref. No.) with detailed resume, current and expected salary to Talent Acquisition via email to [email protected]

Application will be open until the position is filled. Only short-listed candidates will be notified. ASTRI reserves the right not to fill the position.

ASTRI is an Equal Opportunities Employer. Personal data provided by job applicants will be used exclusively for recruitment only