Senior Engineer / Engineer, FPGA Design

Job Description

CTO/ADS/MLP/2465/190226

Job Responsibilities

  • Carry out micro-architecture design, RTL coding, FPGA prototyping and implementation.
  • Carry out integration of 3rd party hardware IP modules.
  • Carry out module-level and top-level verifications, and onboard testing.

Requirements

  • Bachelor’s degree in Computer Science/ Electronic Engineering/ Information Engineering with 6+ years of experience, or Master’s degree with 3+ years’ experience, or PhD holder in related area. Candidates with less experience will be considered as Engineer.
  • Hands-on experience in micro-architecture, RTL coding, FPGA prototyping and FPGA implementation.
  • Solid knowledge on computer architecture, micro-processor, camera interface, and video codec.
  • Familiar with FPGA/SoC design methodology and latest EDA tools.
  • Matlab/C/C++, Python, Cshell and Linux skills are preferred.
  • Knowledge on image processing and computer vision is a plus.

Application

Appointment will be on renewable contract terms with a competitive salary and performance-linked variable pay. Fringe benefits include paid leave, medical and dental benefits, insurance coverage and contribution to MPF. The incumbent will normally work under a five-day week schedule.

Interested candidates should send application (quoting Ref. No.) with detailed resume and, current and expected salary to the HR Department by email. Application open until this position is filled.

Email: [email protected]

Post: 5/F, Photonics Centre, 2 Science Park East Avenue,

Hong Kong Science Park, Shatin, Hong Kong.

Only short-listed candidates will be notified. Personal data provided by applicants will be used for consideration of an application only. ASTRI reserves the right not to fill the position.