Senior Engineer / Engineer, ASIC Design

Senior Engineer / Engineer, ASIC Design

  • Job Description

    ADS/SSP/2229/180116
    2018-01-16
    2018-02-15

    Job Responsibilities

    • Assist in R&D project development
    • Carry out logic design, module-level or top-level verification
    • Carry out firmware design to support ASIC development
    • Research in latest Digital Communications or Cryptography and applications

    Requirements

    • Bachelor’s Degree in Computer Engineering/ Electronic Engineering/ Electrical Engineering/ Information Engineering/ IC Design or related fields with 6+ years’ experience, or Master’s Degree with 3+ years’ experience, or PhD holder in related area. Candidates with less experience will be considered as Engineer;
    • Hands-on experience in IC design and verification (e.g. System Verilog) preferred
    • Algorithm Design experience in Matlab/C in Digital Communications or Cryptography is preferred;
    • Firmware design background (e.g. ARM processor) is preferred.
    • FPGA prototyping and ASIC bring up experience is preferred;
    • Good in Unix/Linux, and script writing skills in Perl, Cshell, and/or tcl.
    • Proficiency in electronic and circuit would be an advantage.

    Application

    Appointment will be on renewable contract terms with a competitive salary and performance-linked variable pay. Fringe benefits include paid leave, medical and dental benefits, insurance coverage and contribution to MPF. The incumbent will normally work under a five-day week schedule.

    Interested candidates should send application (quoting Ref. No.) with detailed resume and, current and expected salary to the HR Department by email (preferable) or post no later than : 15 February 2018

    Email: [email protected]
    Post: 5/F, Photonics Centre, 2 Science Park East Avenue,
    Hong Kong Science Park, Shatin, Hong Kong.

    Only short-listed candidates will be notified. Personal data provided by applicants will be used for recruitment purposes only.