- Assist in ITF R&D project as assigned
- Design and RTL implementation of integrated circuits for communication systems;
- ASIC or FPGA implementation;
- Participate in module level and system level verification;
- Participate in logic synthesis and timing analysis.
- Graduate with a Bachelor’s degree or higher degree in Electronic Engineering or related disciplines, including non-local students, from a local university in Hong Kong.
- Successfully completed the undergraduate/postgraduate program
- Major in or familiar with RTL coding, logic synthesis, functional verification, timing analysis;
To apply, please email [email protected] with your resume, you must quote the Job Ref and include the following information:
- Name of University
- Degree obtained/expecting and when
- Have you participated in ITF Project Internship Program before? Yes/No
- If you answer Yes in item 3, please state the period
- Have you been employed by ASTRI before? If yes, please state the period
- Academic referee
- Your R&D skills
- Your work experience, if applicable
Application Deadline: 30 March 2017
Late applications will not be considered.