Project Intern

Job Description

2017/ART237CP/3DVR/PI/b

Job Responsibilities

  • Assist in ITF R&D project as assigned
  • Carry out research on new technologies in IC design
  • Carry out one or more of the following tasks:
    • Architecture design, Verilog HDL coding, logic synthesis and timing analysis for digital IC design
    • Functional verification and FPGA prototyping
    • Use various lab instrument, such as oscilloscope, signal generator, etc., to perform PCB prototype verification, testing and trouble shooting
    • Development of application software, API or algorithm programming by C/C++, DirectX/OpenGL or GLSL/HLSL Shader

Requirements

  • Graduate with a first-degree or higher degree in Computer Science, Electronic Engineering or relevant disciplines, including non-local students, from a local university in Hong Kong.
  • Successfully completed the undergraduate/postgraduate program
  • Sound knowledge or course project experience in one or more of the following areas:
    • Digital IC design: Verilog RTL coding, logic synthesis, functional verification, formal verification, timing analysis
    • IC implementation flow: ASIC/SoC design methodology, EDA tools (such as Cadence, Synopsys and Mentor Graphics)
    • System level verification: FPGA prototyping, PCB design, board level testing with lab instrument
    • Computer programming: C/C++, DirectX/OpenGL, GLSL/HLSL Shader
  • Proficiency in Linux environment
  • Knowledge in script writing skills in Perl, Cshell, and/or tcl is a plus
  • Team player and strong communication skills

Application

To apply, please email [email protected] with your resume, you must quote the Job Ref No. and include the following information:

1. Name of University
2. Degree obtained/expecting and when
3. Have you participated in ITF Project Internship Program before? Yes/No
4. If you answer Yes in item 3, please state the period
5. Have you been employed by ASTRI before? If yes, please state the period
6. Academic referee
7. Your R&D skills
8. Your work experience, if applicable

Application Deadline: 15 September 2017

Late application will not be considered.