- Work with the technical team in algorithm, hardware architecture design and development.
- Work with the technical team to implement RISC-V SoC on FPGA.
- Work with Software engineers to boot up RISC-V processor.
- Assist in R&D project’s planning and management.
- Conduct research in RISC-V architecture and Trusted Execution Environment.
- Provide training and to develop team members.
- Ph.D. or Master holder in Computer Science, Electronic Engineering, Electrical Engineering, Information Engineering, IC Design or relevant disciplines with minimum 6 years of related experiences. Candidate with less experiences may also be considered.
- Experience in HDL coding is highly preferred.
- Hands-on experience in IC design and verification is highly preferred.
- Experience in processor integration and development is an advantage.
- Knowledge on Trusted Execution Environment is an advantage.
- Experience in FPGA prototyping and debugging is an advantage.
- Excellent analytical and troubleshooting skills is highly preferred.
- Passionate about new technology.
- Live the ASTRI values.
The appointment will be on renewable contract terms with a competitive salary and performance-linked variable pay. Fringe benefits include paid leave, medical and dental benefits, insurance coverage and contribution to MPF. The incumbent will normally work a five-day week.
Interested candidates please send application (quoting Ref. No.) with detailed resume, current and expected salary to Talent Acquisition via email to [email protected]
Application will be open until the position is filled. Only short-listed candidates will be notified. ASTRI reserves the right not to fill the position.
ASTRI is an Equal Opportunities Employer. Personal data provided by job applicants will be used exclusively for recruitment only.