Principal Engineer, ASIC Design

Job Description


Job Responsibilities

  • Carry out research and development for new technologies in secured data storage IC design
  • Carry out system specification, IC architecture definition, micro-architecture design, RTL implementation, logic synthesis and timing analysis for digital IC design projects
  • Develop test plans and monitor execution of module-level and system-level verification


  • BSEE or equivalent education with 10+ years experience / MSEE or equivalent education with 8+ years experience/ PhD or equivalent education with 5+ years experience in digital IC design
  • Hands-on experience in micro-architecture design, RTL coding, logic synthesis, functional verification, formal verification and timing analysis
  • Hands-on FPGA prototyping and ASIC bring up experience
  • Verilog and System Verilog verification experience preferred
  • Prefer design experience or knowledge of storage interfaces such as SD Card, PCIe, USB3.0 SATA
  • Prefer knowledge of mass storage systems, SSD, Flash memory (NAND), LDPC, AES and firmware device drivers
  • Good in Unix/Linux, and script in Perl, Cshell, and/or tcl
  • Team player and strong communication skills


Appointment will be on renewable contract terms with a competitive salary and performance-linked variable pay. Fringe benefits include paid leave, medical and dental benefits, insurance coverage and contribution to MPF. The incumbent will normally work under a five-day week schedule. Interested candidates should send application (quoting Ref. No.) with detailed resume and, current and expected salary to the HR Department by email (preferable) or post no later than 30 April 2016. Email: [email protected] Post: 5/F, Photonics Centre, 2 Science Park East Avenue, Hong Kong Science Park, Shatin, Hong Kong. Only short-listed candidates will be notified. Personal data provided by applicants will be used for recruitment purposes only.