Job Description
2019/ART/273CP/Pl/a-b
Job Responsibilities
They are required to develop design capability in general purpose IO library, ESD protection, and analog IC such as ADC/PLL, to provide a support in layout drawing, tape-out, test chip evaluation, debugging, and documentation. The duties include:
- Be responsible for the design and verification of IO library;
- Provide a support in IC layout drawing and test chip evaluation;
- Implement algorithm investigation for cross platform IO design;
- Learn and apply the skills in IO library design; and
- Maintain accurate and complete documentation of work.
Requirements
- Graduate with a Bachelor or Master’s degree in Electronics/Computer Engineering or relevant disciplines, including non-local students, from a local university in Hong Kong.
- Strong CMOS circuit fundamentals, both digital and analog.
- Hands-on experience with EDA tools such as Design Compiler, Physical Compiler, Spectre, HSPICE, etc.
- Knowledge of CMOS process and devices.
- Working experience with place & route chip design tools.
- Programming or scripting experience using TCL/Python/Skill.
Application
To apply, please email [email protected] with your resume, you must quote the Job Ref and include the following information:
- Name of University
- Degree obtained/expecting and when
- Have you participated in ITF Project Internship Program before? Yes/No
- If you answer Yes in item 3, please state the period
- Have you been employed by ASTRI before? If yes, please state the period
- Academic referee
- Your R&D skills
- Your work experience, if applicable
Application Deadline: until this position is filled. Only short-listed candidates will be notified.
ASTRI is an Equal Opportunities Employer. Personal data provided by applicants will be used for consideration of an application only. ASTRI reserves the right not to fill the position.